David Biancolin
@davidbiancolin
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Engineer @ SiFive; Comp Arch PhD from UC Berkeley advised by @kasanovic & Jonathan Bachrach; @FireSimProject maintainer; I make FPGAs commit treason.
Berkeley, CA
Joined September 2015
Local FPGA support (@XilinxInc U250) and distrib SW sims are coming to FireSim this week! @KarandikarSagar and @NayiriKr will cover these features at OSCAR 2022 at @ISCAConfOrg on Saturday. Thanks to great work by @davidbiancolin @abejgonza @TimSnyderATX!
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Join our tutorial on FireSim and Chipyard at @ISCAConfOrg on June 18th! Attendees will work hands-on with the Chipyard @RISC_V SoC generator and deploy fast FPGA-based simulations using FireSim on @awscloud EC2 F1 instances. Learn more:
fires.im
We’re running a hands-on full-day tutorial on FireSim and Chipyard at ISCA 2022! We’ll be providing access to AWS EC2 F1 instances to attendees free-of-charge to interactively follow the tutorial!...
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FireSim 1.12 and Chipyard 1.5 Released! Check 'em out. https://t.co/aRLWcvIFx4
https://t.co/kyzs7D59lh
github.com
Primarily improvements of features introduced in release 1.4.0, including improvements to the FPGA prototyping flow and to FireSim multiclock support, as well as several new features supporting usa...
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I admire Vivado's tenacity. It's a shame it errors out when a design can't be feasibly implemented. It should switch to a larger device and issue a CRITICAL WARNING with a digikey link. #AlwaysShipTheBits
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okay in case it was not clear, the point here is that cows are eating i can't believe it's not butter to make more butter, so the butter we're eating are also less butter and more i can't believe it's not butter
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FireSim 1.11 Release. Wherein Albert Magyar fits 16 LargeBOOM cores on a single Xilinx VU9P 🔥🔥🔥 (Without resource optimizations only two fit). Release notes here: https://t.co/D8bnM4ycQ8
github.com
FireSim 1.11.0 formally introduces the instance multithreading optimization, the subject of Albert Magyar's dissertation work, which can be used to dramatically improve FPGA capacity (e.g., 2 -...
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Oooooooooooooof
Not exactly what we had in mind
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Don’t be afraid of Covid? Sheeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee-it!
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FireSim 1.10 (with Multiclock!) and Chipyard 1.3 have been released. Check them out! https://t.co/UA7hKC3uPH
https://t.co/EzUoswykY4
github.com
A more detailed account of everything included is included in the dev to master PR for this release: #500 Added A new Top-level module, ChipTop, has been created. ChipTop instantiates a "syst...
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If FireSim were to support local boards, which would you be most interested in?
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We've just shipped FireSim 1.9.0 with FirePerf support, just in time for virtual @ASPLOSConf 2020! Check out the release notes and our revamped FPGA debugging and profiling docs! Release notes: https://t.co/xRihIxoa6J Debugging/Profiling Docs:
github.com
[1.9.0] - 2020-03-14 A more detailed account of everything included is included in the dev to master PR for this release: #486 Added TracerV + Flame Graph support from FirePerf ASPLOS 2020 paper (...
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Join our tutorial on FireSim (@firesimproject) and Chipyard at @ASPLOSConf on March 16th! Attendees will work hands-on with the Chipyard @risc_v SoC generator and deploy fast FPGA-based simulations using FireSim on @awscloud EC2 F1 instances. Learn more:
fires.im
We’re running a hands-on full-day tutorial on FireSim and Chipyard at ASPLOS 2020! We’ll be providing access to AWS EC2 F1 instances to attendees free-of-charge to interactively follow the tutorial!...
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Join us at the @chisel_lang Community Conference next week! We'll have a talk on Golden Gate by @davidbiancolin and a tutorial on FireSim and Chipyard by @realAlonAmid and @KarandikarSagar:
events.linuxfoundation.org
On January 29 - 30, CHIPS Alliance will host CCC2020, the 3rd Chisel Community Conference.
Third (!) @chisel_lang Community Conference happening soon:
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lecturing on vector processors today in grad comp arch
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I wonder what fraction of unique ASIC designs taped-out last year could fit on this behemoth.
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And now Albert Magyar giving his talk on Golden Gate: FireSim's new compiler!
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Jenny Huang giving her talk on Centrifuge! A really cool example of using HLS for full-stack HW/SW co-design. She takes HLS-generated Verilog all the way through FireSim!
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