Cysic
@cysic_xyz
Followers
25,035
Following
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Statuses
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ZK Proof Generation Layer ｜ Discord: Telegram: Medium:
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Joined June 2022
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What is Cysic?
Cysic is the first real-time ZK proof generation and verification layer in
@VitalikButerin
's Ethereum roadmap. ZK is the end game; Cysic is the key to the end game.
ZKP generation used to be resource-intensive and centralized. Cysic hyperscales ZK by leveraging…
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🔥ZK Olympic Airdrop Campaign is live
Cysic, together with
@MantaNetwork
and
@LumozOrg
join forces to bring you the ZK Olympic Campaign on
@Galxe
.
🎁Complete easy tasks to learn more about ZK and win a share of the $2,000 prize pool?
Join the campaign now ⬇️…
79
3K
3K
#CysicXspace
With the emergence of the ZKP industry, how can we benefit from it? Let’s learn and discuss the potential of ZK Hardware Acceleration and ZK Prover Network with builders、investors and miners!
📅 3/29 9pm SGT, Language(中文）
🎁50U Giveaway for 5 winners
✅Follow…
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GM HK!💙
Cysic's co-founder,
@leofanxiong
, has been invited to speak at the following conferences at the upcoming
#HongKongWeb3Festival
！
April 5th — Pannel “脑暴对话：AI的故事还能讲些什么？” hosted by
@7upDAO
🔗Register
April 7th — Innovative…
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The updated spec for
@z_prize
2023 Prize 1 is published. Please check it out at repo: . Have fun accelerating ZKP!
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1/3 Thanks to
@drakefjustin
for mentioning Cysic as one of the flagship companies dedicated to building ZK-ASICs.
Our goal is to make specialized chips that do end-to-end acceleration for ZK proof generation and thus generate proofs in real time. Please join us in
@z_prize
1b…
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Cysic Partners with
@z_prize
to Advance Hardware Acceleration for ZKP. Want to learn more about the rationale of our design, please take a look at this post:
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💡 Blog Review Time: Exploring ZK Hardware Acceleration Through Past, Present, and Future Perspectives
Let’s delve into the blog by Cysic Co-founder
@leofanxiong
and Polychain
@lukejdpearson
to explore the current bottleneck of ZK and why the combination of
#ZK
&
#Depin
is the…
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We extend our gratitude to our incredible investors. 🤝
More than ZK hardware acceleration, Cysic is building ZK-CaaS （Compute-as-a-Service) network that aims to integrate capabilities for individual validators and enhance the ecosystem's robustness.
🎉Stay tuned for more…
The funding round was led by
@polychaincap
, with participation from
@ABCDECapital
,
@ANT_Capital
,
@HashKey_Capital
,
@snzholding
and
@Web3com_VC
.
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14K
3K
Get some free time on weekends and interested in ZKP hardware acceleration. Perfect! We get you something to read. ZK Hardware Acceleration: the Past, the Present and the Future:
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@polychaincap
@ABCDECapital
@HashKey_Capital
@snzholding
@Web3com_VC
Cysic is closely working with many ecosystem partners, including
@anoma
,
@axiom_xyz
,
@btq_ag
,
@labs_electron
,
@EspressoSys
,
@HerodotusDev
,
@HyperOracle
,
@MantaNetwork
,
@MinaProtocol
,
@ModulusLabs
,
@nil_foundation
and
@Scroll_ZKP
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We just did a presentation and live demo at Applied ZKP group. Will upload the talk video when it's available. The takeaway is the MSM is not a bottleneck for ZKP computation anymore, so will be the NTT module in next month.
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1/7)
Vitalik Buterin delved into inefficiencies of ZK-SNARKs, MPC, and FHE in Hong Kong.
He highlighted ZK-SNARKs' 20-minute proof times, contrasting Ethereum's goal for real-time proofs. Solutions include parallelization, aggregation trees, and ASIC acceleration.
We believe…
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We are happy to help architect one prize for
@z_prize
2023. In this prize, we aim to further push the limits of hardware acceleration for ZKP by focusing on end-to-end proof generation. Want to let us know your thoughts? Please join the discord server:
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The progress in ZK systems provides benefits like smaller proof size and faster proving time but also poses challenges in hardware design. The main issue is creating hardware that supports multiple ZK systems and potential updates. We use ZK-ISA to address this issue, 1/
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We are glad to be featured on
@cbventures
's "Understanding the Zero-Knowledge Landscape"!
🏆 While
#Cysic
is the World’s leading ZK-ASICs manufacturer, our product is more than Hardware Acceleration.
🔥 Cysic’s Prover Protocol will be rolled out soon! Stay tuned!…
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This could be what ZK + DePIN looks like. You'll need to generate some zk proofs. Anyone interested? 👀
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Please join us at zkDay on Feb 28th in Denver! It will be a fun day full of ZK-related talks, discussions, and activities :) We look forward to seeing you there!
@polychaincap
@MantaNetwork
@Scroll_ZKP
@AleoHQ
@cysic_xyz
@VeridiseInc
@nil_foundation
@ModulusLabs
@HyperOracle
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Really appreciate
@MantaNetwork
and
@polychaincap
for hosting the wonderful zkDay event. We had many fruitful conversations.
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Although our acceleration result for the common modules is amazing, but there is still room to improve for end-to-end acceleration, since the percentage for accelerated MSM and NTT is quite small. Our job in the next months is to accelerate every components in the process.
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1/4 🎉Huge congrats to the
@z_prize
ZPrize 1A winners! With your relentless efforts, we are pushing the limits of accelerating MSM on BLS12-377 and BLS12-381 curves using FPGA and GPU!
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Thanks to
@Ingo_zk
for citing our work in a recent post. We feel the urge to share our experience in designing a massively connected FPGA system, the secret sauce of the two orders of magnitude speed up:
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🎉We are thrilled to announce that
#Cysic
Co-founder
@leofanxiong
has joined
@z_prize
as a mentor.
ZPrize is a community that focuses on promoting the use and development of zero-knowledge cryptography.
In ZPrize 2023 competition, we help design the Prize 1: End-to-End…
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💡Cysic re-designs ZK-ASICs in a zkVM way.
Inspired by the Amdahl’s law, a new paradigm for ZK hardwareacceleration has emerged. Stay tuned for our enterprise-grade, end-to-end zkVM acceleration solution.
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☀️GM fam!
☕️ A bright and productive week lies ahead of us.
Lots of progress has been made these days when we're offline. It's been motivating to see the
@Scroll_ZKP
@taikoxyz
@zksync
@MantaNetwork
@ModulusLabs
@LineaBuild
@zkp2p
@fluentxyz
@HerodotusDev
@inconetwork
…
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Thanks for the support. Looking forward to our collaboration!
Congratulations
@cysic_xyz
! We are excited to see how you push ZK hardware technology forward
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For those who cannot come for our talk at the
@zkdayofficial
, here are some parts of our presentation. We have made a lot of progress in the past months to accelerate these common modules. Using our hardware,
these modules are not bottlenecks any more!
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The ZPrize'23 Prize 1 officially kicks off. The repo of test harness and spec is here: .
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🔥Cysic Co-founer
@leofanxiong
shared his insights on ZK hardware acceleration at the Zero-Knowledge Demo Day panel.
@pitchtalk_com
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Thanks for the support. Looking forward to our collaboration!
Cysic is going to boost up the performance of every partner, very excited to see this coming!
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Here’s the recording of our cofounder
@leofanxiong
talk at Future Computing Workshop
@DelendumV
: Hardware Accelerating ZKP
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Our cofounder, Leo Fan
@leofanxiong
, just talked about recent developments on the hardware accelerating ZKP at
@DelendumV
Future Computing Workshop. Come chat with us!
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🔥We got Alpha from
@VitalikButerin
: Keep an eye on ZK ASIC Acceleration ——
#Cysic
Cysic is committed to designing advanced ASIC chips to help reduce ZK proof generation time, and has completed FPGA-based POC design.
Based on the POC results, Cysic’s ZK hardware acceleration…
【Vitalik Buterin：ZK-SNARKs、MPC、FHE 等效率低下，需实现实时证明】
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In Austin for Consensus
@consensus2023
? We are here as well. Let’s grab a coffee to chat about ZK, hardware acceleration and ZK Prover DAO.
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☕️Happy Sunday!
Our co-founder
@leofanxiong
spoke at the panel discussion titled "L2 Ecosystem Application/Service" on the main stage of the Hong Kong Web3 Festival
@festival_web3
! Leo shared insights on computation resources for ZK-Rollups.
Cysic's remarkable ascent to the…
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Electron Labs offers an interoperability solution that securely links blockchains without reliance on a trusted intermediary.
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🧠 Great Minds Think Alike
At
#WSC2024
hosted by
@DRK_Lab
,
@VitalikButerin
gave a speech on "Reaching the Limits of Protocol Design," pointing out that using ASIC for ZK hardware acceleration is one solution to help Ethereum achieve real-time proof.
Meanwhile, our cofounder…
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The door of zkDay is open. Come talk to us! Our talk about end-to-end hardware acceleration starts at 11:30!
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We had a wonderful time at ETH Denver. So many interesting conversations at zkDay
@MantaNetwork
@polychain
/Future Computing workshop
@DelendumV
and discussions at the main event
@EthereumDenver
. Now let’s get back to BUIDL. See you next year!
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Thank you. Looking forward to our collaboration!
We are thrilled to be working with
@cysic_xyz
, a pioneering company bringing ZK hardware acceleration mainstream
#ZKP
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A comprehensive report on the state of ZK. Happy to contribute the report.
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In the past several months, we have made substantial progress in hardware accelerating ZKP. Interested in how your ZK circuits can benefit from our acceleration results, please fill out the form here:
🙌🏼Meet
@cysic_xyz
Tech Speaker at
#zkDayParis
!
Featuring
@leofanxiong
, Co-Founder of
@cysic_xyz
🗣 Topic: Solar ZKP: End-to-End Hardware Acceleration for ZKPs
📅 11:30 PM - 11:55 PM
🚀Interested in the topic? Join us on July 19th at
#ETHCCParis
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Here is the recording of our presentation/demo last Friday: . Please let us know if you have any questions or would like to try the demo.
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2/3 Our experimental path is to accelerate different major modules on the proof generation as much as we can. This is why we build the massive FPGA machine that can compute each module at blazing fast speed.
However, this FPGA approach does not achieve a satisfactory E2E…
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The 2024 DePIN Global Hardware Summit, hosted by
@Global_JDI
, is live today!
Our cofounder
@leofanxiong
shared his insights on the current DePIN Projects landscape and the future of DePIN. As a
#zk
+
#depin
project, Cysic continues to advance the DePIN space through ZK Prover…
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The funding round was led by
@polychaincap
, with participation from
@ABCDECapital
,
@ANT_Capital
,
@HashKey_Capital
,
@snzholding
and
@Web3com_VC
.
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After our first public announcement at the ZKP workshop, we seem to be the front-runner in the FPGA acceleration. Tons of queries have come to us right after the talk, with one simple question：
How can we achieve 1.82x – 5.63x speedup over the other FPGA accelerations? 🧵
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Welcome aboard! We are delighted to have you on our team!
1/ Thrilled to share that I've joined
@Cysic_xyz
as a Business Development Manager.
We're on a mission to revolutionize the ZK proof generation process by providing hardware acceleration for ZK projects, and I'm excited to be a part of this journey. 🧵
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Want to know more about end-to-end hardware acceleration for some interesting ZK circuits? Come join us at
@zkdayofficial
!
📝zkDay Agenda Announcement
We have an amazing group of panelists and speaker!
#zkDayParis
Perks
🤯ZK alpha (panels, workshops, tech talks)
🍿️Free food, drinks, snacks
🧑💻Tech room for Hackers
🚀High-performance Wi-Fi
⌚️July 19th 11AM GMT+2
Share zkDay:
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👀 ZKP + DePin = Cysic
.
@VitalikButerin
is right about
#DePIN
.
His premise is accurate -- DePIN is a new name for a space that's been around for many years.
And his subsequent question is totally valid.
It doesn't mean, however, that DePIN's time has not come.
The same way someone could have…
1K
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3/3 Justin’s thoughts on designing ZK-ASICs re-emphasize the takeaways from our cofounder
@leofanxiong
’s talk a day ago, i.e. using ZKVM to not only simplify the chip design, but also obtain a higher performance.
The ZKVM brings several key hardware friendly properties, such as…
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@polychaincap
@ABCDECapital
@ANT_Capital
@HashKey_Capital
@snzholding
@Web3com_VC
Thanks to
@TheBlock__
for covering this news:
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"Cysic is committed to designing advanced ASIC chips to help reduce ZK proof generation time, and has built a top-notch hardware design and development team that has completed FPGA-based POC design. Based on the POC results, Cysic’s ZK hardware acceleration capabilities have been…
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🔍 Analysts from VanEck's digital assets liquid fund emphasize that “ DePIN projects that have serious potential are ones where demand for the underlying service is clearly identifiable, meaning that the customers already exist.”
🚀 Cysic’s unique position is underpinned by the…
Venture capitalists are already obsessed with DePIN.
They've pumped billions into the sector, with some dedicating entire funds to DePIN protocols.
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Would like to know how fast SolarMSM Gen1 can be? Here's a recorded demo for it:
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🔔Set a reminder and tune in this Friday!
🎁100U Giveaway for Xspace Listeners!
🧐Have questions for the topic? Drop them below!
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Our cofounder and CYO recently chat with Siyuan from
@ABCDECapital
about our vision about hardware accelerating ZKP and more use cases about our product. Here’s the episode:
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Interested in exploring how to make ZKP faster with us? We have openings on ZKP researchers. Please apply it here:
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3/7)
We're thrilled by the acceleration results for common modules.
ZKP requires significant resources, such as 9000s for GPT-2 proofs or 280GB RAM for ZK-EVM. This leads to the need for efficient and cost-effective ZK hardware.
Our proposed solution, a hybrid FPGA and ASIC…
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Please join us at Cornell Blockchain Conference for the latest updates from Cysic.
Cornell
#Blockchain
Conference 2023 shares the next workshop in our
#ZK
Deep Dive Series:
📌 “Optimized Hardware for Proof Generation” by Leo Fan
@leofanxiong
— co-founder of
@Cysic_xyz
and Assistant Professor of CS at Rutgers University.
🎟️ Tickets:
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Stay tuned. We will publish ZKP acceleration result on our customized FPGA server soon. See you at
@EthereumDenver
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We wrote a post (), explaining this observation.
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Congratulations,
@axiom_xyz
! We are very excited about this amazing announcement!
We are announcing Axiom, the ZK coprocessor for Ethereum:
Axiom provides smart contracts trustless access to all on-chain data and arbitrary expressive compute over it. Like GPUs do for CPUs, Axiom augments blockchain consensus with zero-knowledge proofs.
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Yes, we do believe combing FPGA and ASIC like we what we do can deliver the best performance for ZKP proof generation.
9-s. Despite all existing zk apps and use cases, there needs to exist proper hardware to deliver the proofs. Hardware acceleration is a major blocker but
@cysic_xyz
combines FPGA and ASIC in its architecture to achieve highly performant proving times.
E: 1/3
A: 3/3
T: 2/3
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We will be presenting our FPGA accelerating results tomorrow morning at the ZKP workshop. See you guys there!
Join us @ ZKP Workshop, Oct 30: , with amazing speakers: Shafi Goldwasser
@danboneh
@0xPolygonHermez
@0xPolygonZero
@AleoHQ
@Scroll_ZKP
@RiscZero
, & many others!
What questions do you want to get answered about latest zkp development and zkEVM?
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4/4 🔥Last but not the least, the ZPrize 2023 is not over. We have ZPrize 1b on-going, where the goal is to accelerate end-to-end ZK proof generation in an energy efficient manner. Join us for the amazing ride with $500k USD award!
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GM Fam 🫶
#Cysic
official telegram group is live!
📡Join us to stay in the loop with our announcements and updates. Come connect with the team and our amazing community:
Your journey with us is just beginning! LFG🚀
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Happy to contribute to the ZK ecosystem!
🔥 We are thrilled to announce that
@leofanxiong
, Co-Founder of
@cysic_xyz
& Assistant Professor at Rutgers University, will join the ABCDE ZK Hacker camp as a mentor.
Discover more about Hardware Acceleration with Leo😎
Secure your spot now:
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Stay tuned. Our cofounder
@leofanxiong
will be presenting an overview of our hardware acceleration ZKP.
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6/7)
zkVM is our trump card. This flexible design supports a variety of configurations, from integrated chips in the chassis to portable solutions. zkVM's hardware-friendly features include parallel processing for simultaneous generation, minimal I/O bandwidth via compact proof…
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Interested in working on cutting-edge hardware techniques for ZK. We have openings for RTL engineers. Please apply here:
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Huge shout out to the guests and media partners !
🎙️Host:
@BeWaterOfficial
🎙️Speaker:
- Cysic Cofounder
@leofanxiong
-
@Scroll_ZKP
Cofounder
@sandyzkp
-
@ABCDELabs
Junior Partner
@cyodyssey
- Matrix Partners Investor
@Zixi41620514
-
@OKX_Ventures
Investor…
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Congratulations to the ZPrize
@z_prize
winners! It’s a pity that we are too late to join the ZPrize competition. We received many status queries after our initial announcement at the ZKP workshop
@BerkeleyRDI
. Our roadmap for the MSM part is as follows:
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@shumochu
@sreeramkannan
@aeyakovenko
@prestonevans__
@nickwh8te
@toghrulmaharram
@kellymolson
We will announce these wild FPGA numbers at eth Denver :D
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Our cofounder,
@leofanxiong
, will be speaking at
#MITBitcoinExpo
. Please come to the event!
Get ready to dive into the fascinating world of cryptography with
@LeoFan
at
#MITBitcoinExpo
2023! Leo is a cofounder of Cysic
@cysic_xyz
, an Assistant Professor at Rutgers University, and an expert in formal verification and hardware acceleration. Don't miss out!
#Bitcoin
#ZKP
🎓
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It's an honor for Cysic to support and mentor with our co-founder Leo Fan (
@leofanxiong
) in the End-to-End Competition (Prize 1B) hosted by
@z_prize
.
Welcome to join the Zprize 2023 Winners Announcement.
We can’t wait to build the most energy-efficient end-to-end zero-knowledge…
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Happy to support
@zkdayofficial
. See you in Paris!
8/
💡
@cysic_xyz
is on a mission to revolutionize the ZK proof generation process by providing hardware acceleration for ZK projects. It aims to tackle the scalability challenge of ZK-based projects head-on.
🗓️ Don't miss the chance to meet
@cysic_xyz
on July 19th at
#zkDayParis
!
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3/4 🏅In the FPGA track, Yrrid Software delivered the fastest implementation on average. We award
@SuperScalar_io
for the best performance for MSM over BLS12-377 curve, where their FPGA clock frequency is the highest.
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@DCbuild3r
@reilabs_io
@__geometry__
@class_lambda
@Ingo_zk
@UlvetannaHQ
@zksecurityXYZ
@zellic_io
@VeridiseInc
As
@kobigurk
said, “Can't We All Just Get Along,” :D
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Thanks for the support. Looking forward to our collaboration!
Hardware acceleration for ZKPs is coming much faster than expected. We are excited for the performance improvements it will bring across the space and look forward to
@cysic_xyz
's benchmark releases!
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We will publish a blog post soon, elaborating the rationale behind this claim. Stay tuned!
- Bowen from
@cysic_xyz
: HyperPLONK won't solve all your problems, we need ZK proof system and hardware accelerator co-design
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5 / How about ASIC for ZKP？
ASIC is believed to be the ideal hardware for ZKP for its outperformance on the above two metrics, but it takes longer to get to the market. If ASICs attain dominant scale and stability, they may become the preferred hardware for optimized…
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