Dreams don't affect reality, but they may influence your actions. Turns out this applies to AMD CPUs too! After a long embargo, we can now present Inception, a new transient exec. attack that leaks data on all AMD Zen CPUs. With @wiknerj and @kavehrazavi.

RT @theflow0: Details:

RT @wiknerj: The first ever end-to-end cross-process Spectre exploit? I worked on this during an internship with @grsecurity! An in-depth w….

RT @taviso: New write-up on an Intel Ice Lake CPU vulnerability, we can effectively corrupt the RoB with redundant prefixes! 🔥 An updated m….

RT @kavehrazavi: Phantom just won a best paper award at @MicroArchConf! Phantom shows the security implications of pre-decode speculation t….

RT @FlavienSolt: Oh! 37 new bugs (28 new CVEs) discovered in 5 RISC-V CPUs (e.g., BOOM and CVA6)! #Cascade fuzzes #RISC-V CPUs based on nov….

RT @kavehrazavi: We built a RISC-V CPU fuzzer that generates test programs in a clever way and it rained CVEs! Cascade brings CI/CD to CPU….

RT @vu5ec: Our uncontained paper @USENIXSecurity is online! Find out how the Linux kernel is the "container of" several type confusion bugs….

RT @vu5ec: Our FloatZone paper @USENIXSecurity is online: a branchless memory sanitizer that efficiently catches buffer overflows (+ use-af….

@wiknerj @kavehrazavi AMD has rolled out hardware- and software patches to mitigate this issue. We will present Inception this week at the 32nd USENIX Security Symposium. For more information about Inception and the papers, visit:

RT @bjg: Paper from @vvdveen & me about using the DRAM row conflict signal as a sidechannel on uncached execution (for protection): https:/….