Check out my new video: Generate and program bitstream for Zynq, on the Zynq itself. You'll need 512 MB memory, swap area, and patience. #ZYNQ #FPGA #OpenXC7 https://t.co/eWtl5SiV5F

#FPGA #HDMI Have a better use case for your 4K monitor? Joke aside, display devices are taken for granted, but they're not easy to make! Just like the chips! Imagine making one from scratch, let it be analog or digital, it might turn out CRT's the easiest to build!

$WMTx is the most disruptive force telecom has seen since day one, and every part of World Mobile is built to use it seamlessly and constantly. The list below is by no means final but just in case you needed a reminder: AirNodes: Operators are compensated in USD (for now), but

it's called gdsjam because the domain is only 10 bucks ( https://t.co/vv3taUczrg)

added a standard cell from this self-generated 5-bit SAR ADC (SARADC) https://t.co/EIgOiEbTZa

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how to do chip design, en espanol

Some days are really good days: "I would be very pleased if I could contribute to the specification of a truly good waveform viewer. I've seen many commercial "solutions" where each time I wondered whether the developers had ever spoken to the engineers who would later have to

The new blog post continuing on the series of bare bone Raspberry Pi is here. This time I enable SPI : Serial Peripheral Interface with assembly on RPi. https://t.co/YO3ffkH4WJ

FPGA dev but is writing assembly: https://t.co/cAvp6COm2L I don't have a fast enough oscilloscope to see what's the difference of physical signals with/without these words, yet.

Twitter's like a school, there're people graduating and new people coming, but I'll be here having unchanged FPGA contents! Patch merged to nextpnr-xilinx for HDMI support! Somehow, IN_TERM.NONE and IN_ONLY words are required for *output* TMDS_33 I/Os.

The world isn’t lacking in intelligence. In fact intelligence is common place. More intelligence, artificial or otherwise won’t solve our problems. At least not the ones that really matter.

Elon Musk:"In the future everyone will be rich and to-work will be optional". I am pretty sure he is wrong on that. The powerful people will still make the powerless people serve the powerful people.

Testing a new SDR prototype: - ADI ADR902X (4T4R 200MHz bandwidth) - Alinx Artix Ultrascale+ PCIe Board Gen4 X4 - LitePCIe - LiteJESD204B (4 lanes @ 9.8304Gbps) - Custom LiteX SoC. Here observing the full Bluetooth band with SoapySDR & GQRX! (and with some margin😅) COTS

People always want to use ADCs for things you don't need ADCs for. Instead you can just use time constants. The CH572 has no ADCs but that doesn't stop me from measuring battery voltage and the pressure on some silicone buttons. https://t.co/HxuBTVpqjx

Hard reality checked in: LPDDR4X costs are up 5x YoY. 🤯 We have to raise prices on affected products...

This outdoor installation of a 4G basestation does not follow the Huawei guidelines (I shot the picure myself).

@eevblog I take back what I said about the Logic Analyzer being a side feature. Having an analog capture that is locked/in-step with relation to digital line captures is a game changer haha. I didn't know I needed this until now:

a while ago @mikelectricstuf made a video about the different methods of driving LED displays w/FPGA covering PWM and gamma correction - very useful if you enjoy driving these yourself (I do). https://t.co/ornOCUp5Lc

適当な回路を仕込んで、自作カメラのI2C経由で、Spartan-7 自信のコンフィギュレーション用の SPI-ROM が読めるようになってきた。 容量は２面分あるので、JTAGケーブル無しでのセルフアップデートが検討できそうな気がする。

So, @SipeedIO sent me their new SLogic16U3 USB3 logic analyzer to review(free, no obligation). Inside is just a tiny Gowin GW5AT-LV15 FPGA doing softcore USB3(!!!), which is how they made it so cheap. 800MHz@4ch is quite impressive. My verdict? Definitely going in the tool box.