Santa, all I want for Christmas is an EXE:5200B.

Taiwanese media reported that TSMC plans to build its second Kumamoto fab in Japan as a direct jump to 2nm. That would mean TSMC is considering a more advanced facility in Japan than the 4nm plant reported by Nikkei. https://t.co/Xae2gTvl81

Fab 52 EUV bay snapshot. You can see a 3800 standing tall there, and another 2 spots reserved for future 3800s.

I said this back in February: Arizona Fab 52/62 is a ~40K WSPM-class ramp, and Fab 52 should reach HVM in 2H’25. Now CNBC basically puts it on camera for everyone. In their interview, Naga Chandrasekaran states clearly: “Fab 52 itself is capable of running more than 10,000 wafer

Great Article Couple tidbits from Naga: Fab 52 can do 40k WSPM (yuge way more than TSMC Az) "We are making yield improvements, defect density improvements, month-over-month and hitting our goals," "So I believe we have turned the corner." $INTC https://t.co/ARV5k3gjMN

D1X Mod4 Key Plan More Intel 14A analysis on my Substack: https://t.co/VXQlcrYnz9

Intel just filed an application to extend the land-use approval for its Ronler Acres campus by two years to support the D1X Mod 4 (D1XM4) construction project. To me, this is a clear signal: Intel is not abandoning additional fab build-out in Oregon and will continue progressing

Exclusive: Now I'm going to disclose the key parameters of Exynos 2600 Galaxy S26 - 2nm Exynos 2600 CPU：10 core 3.9Ghz+ 3.25Ghz +2.75Ghz GPU: AMD JUNO 985MHz Open Gles 3.2、OPEN CL 3.0、VULKAN 1.3

I didn’t see this coming… It looks like Apple’s ASIC—and an unidentified Broadcom ASIC as well—may be using Intel for back-end packaging.

独自です🔽 ラピダス、EUV露光装置の増設開始　2台目を工場に搬入、26年4月以降さらに複数台：北海道新聞デジタル ▼記事はこちら https://t.co/OcNzrcrsT5

Apple Tested a MacBook With the A15 Chip https://t.co/VBIQ8gc3gr

Rapidus explores panel-level packaging on glass substrates for next-generation processors — aggressive plan would help it leapfrog rivals

My substack post talking about 14A and Lip-Bu's political play: https://t.co/LG2pSUtCQ4

Intel VP John Pitzer: “We have roughly 30% of our wafers outsourced today… we were talking about trying to get that to zero… That’s no longer the strategy.” If “14A ROI is uncertain” → why not pull back more wafers from TSMC to support 14A economics? If “Ohio is pushed out

SK Hynix M15X 2nd Cleanroom Equipment Move-in Soon... Entering Hook-up Design Phase SK Hynix has started the hook-up design for the second cleanroom at its Cheongju M15X production plant (fab). Hook-up design is the process of pre-determining the connections between major

ラピダスブースにて！ 2nmウェハ実物らしい！ ※掲載許可頂きました

A major milestone in Albany, NY! Gilbane Building, in joint venture with DPS Group Global, has officially topped out the NanoFab Reflection facility at the NY Creates Albany NanoTech Complex. https://t.co/i9KxMvA5r9

It's a coordination failure: everyone wants a second foundry, but nobody pays to create it. First mover takes the risk, everyone else gets the leverage. Lip-Bu's response is brutal: take a stand, or he kills the shared asset, 14A. More on my Substack: https://t.co/26FW5RMqzT

If Intel Foundry fails, equipment vendors become even more dependent on a smaller number of leading-edge volume buyers. Design houses don’t wake up dreaming about vendor lock-in. The U.S. cares about owning the frontier, not merely renting it. More analysis about 14A politics 👇

High-NA EUV is key for the Intel 14A. With the 5200B accepted, Intel is one step closer to high-volume production on 14A. Intel 14A is not just a pure process technology—it's Intel's trump card. My Substack post about Intel 14A: Lip-Bu Tan's Ultimatum: https://t.co/VXQlcrYnz9