logic destroyer
@splinedrive
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Hobbyist since 2021 — custom RISC-V SoCs with MMU, running Linux/XV6. Full-stack, from RTL to ASIC. No IP. No bullshit. c / c++ / SystemVerilog
Joined November 2012
A small step for a hobby logic designer, but a giant leap for @tinytapeout. The first official RISC-V uLinux ASIC, yes, ASIC, you heard that right, is operational and functional. Just dabbling in chip design as a hobbyist. Haha, what an awesome achievement! Thanx to @matthewvenn
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Outrageous. Robots have rights too. Such a waste of transistors, such a waste of all that logic design. It's cruel. I can't watch something like this.
Peak degen SF tech bro last night at an underground robot fight club
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RT @ferron_web: Why some Rustaceans describing their programs are like: "memory-safe 🦀 blazing fast 🦀 configurable 🦀 rewritten in Rust 🦀 on….
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RT @matthewvenn: HDL is the #ASIC terminology of the week!. In the last month, HDL has been the 19th most popular o….
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RT @splinedrive: Even at 10 GHz, a 64-bit counter won’t roll over for ~58 years. At 1 GHz? Over 5 centuries. Yeah, 64 bits go a long way.
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Even at 10 GHz, a 64-bit counter won’t roll over for ~58 years. At 1 GHz? Over 5 centuries. Yeah, 64 bits go a long way.
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logic [63:0] count;.always_ff @(posedge clk) reset ? 0 : count <= count + 1;.
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RT @splinedrive: …got the picture from @matthewvenn. Dude, how awesome is that? Is going great, rock solid, just the way it should be. http….
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…got the picture from @matthewvenn. Dude, how awesome is that? Is going great, rock solid, just the way it should be.
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RT @splinedrive: @ferron_web No, I build rock-solid, deterministic systems, because I know exactly what I'm doing.
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No offense, but that sounds like cognitive dissonance.
As a senior software engineer with 10+ years of experience here is what you should know to get a job. Figma.Ubuntu.C programming language.Kubernetes.Inhertance.Nodejs.Go. Nginx.OCaml.Typescript.Hibernate.InfluxDB.Nerlify.Git.
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