#IEDM2025 Highlight: CMOS-Compatible Spike-Embedded Neuromorphic Sensor Paper 34.1, “Monolithically Integrated Photodiode–Spiking Circuit for Neuromorphic Vision with In-Sensor Feature Extraction,” S. Kim et al, KAIST, Korea/Part 5 https://t.co/QQBoANQ3gA

#IEDM2025 Highlight: CMOS-Compatible Spike-Embedded Neuromorphic Sensor C-SENS enables convoluted neural network-style feature extraction in analog domain w/minimal energy use, wide spectral response (300 to 800nm) & fast light response time (<1µs)/Part 4 https://t.co/QQBoANQ3gA

#IEDM2025 Highlight: CMOS-Compatible Spike-Embedded Neuromorphic Sensor The C-SENS sensor directly converts light intensity into frequency-modulated spike trains, performing a light-sensitive multiplication-accumulation mechanism./Part 3 https://t.co/QQBoANQ3gA

#IEDM2025 Highlight: CMOS-Compatible Spike-Embedded Neuromorphic Sensor C-SENS architecture eliminates conventional digital processing bottlenecks of CIS-to-ADC conversion (converting image sensor signals to digital data), & DRAM-cache transfers./Part 2 https://t.co/QQBoANQ3gA

#IEDM2025 Highlight: CMOS-Compatible Spike-Embedded Neuromorphic Sensor (C-SENS): KAIST discusses a biomimetic, or biology-mimicking, vision sensor integrating photodiodes & TFT-based spike circuits to perform in-sensor optical-to-spike conversion./Part 1 https://t.co/QQBoANQ3gA

#IEDM2025 Technical Highlight – Advances in Sensing and Imaging Paper 13.1, “A Multi-Shear-Mode Silicon Bulk Acoustic Clock Achieving 102ns Time Deviation at 8 Hours,” B. Jabbari et al, University of Michigan /Part 4 https://t.co/v5kWOLTdqo

#IEDM2025 – Multi-Shear-Mode Silicon Bulk Acoustic Clock achieved -110dBc/Hz phase noise & ±135ppt drift/24 hrs – a benchmark for MEMS clocks vs. mini rubidium atomic – with 2–3 orders of magnitude lower size, power, & long-term frequency stability./Part 3 https://t.co/v5kWOLTLfW

#IEDM2025 – Multi-Shear-Mode Silicon Bulk Acoustic Clock: Silicon bulk acoustic clock leverages two dual shear-mode Lamé resonances in a single bulk acoustic wave resonator with Duffing-based thermal drift compensation in a 0.25cm³, 130mW package./Part 2 https://t.co/v5kWOLTdqo

#IEDM2025 – Multi-Shear-Mode Silicon Bulk Acoustic Clock: U. Michigan & U. Florida present the first silicon MEMS clock w/102ns time deviation at 8 hrs (approaching atomic standards), in a chip volume smaller than a quarter of a sugar cube./Part 1 https://t.co/v5kWOLTLfW

#IEDM2025 Celebrate the season with family and friends, wherever you are in the world.

#IEDM2025 – Transistor-to-Package Thermal Simulation w/Hotspot Mitigation: Paper 17.4, “Transistor-to-Package Thermal Simulation with Hotspot Mitigation by Decoupling”, T. Chou et al, National Taiwan University/Part 5 https://t.co/Atkg3o3sAt

#IEDM2025 – Transistor-to-Package Thermal Simulation w/Hotspot Mitigation: CFETs accumulate more heat than NSs, w/hotspot heating 27–53% of total max temp. The work provides insights into thermal management & reliability in next-gen 3D ICs./Part 4 https://t.co/Atkg3o2UKV

#IEDM2025 – Transistor-to-Package Thermal Simulation w/Hotspot Mitigation: Hotspot mitigation solutions include dummy vias, AlN bonding oxide, thermal vias, & high-thermal-conductivity inter-layer dielectrics for backside power delivery networks./Part 3 https://t.co/Atkg3o3sAt

#IEDM2025 – Transistor-to-Package Thermal Simulation w/Hotspot Mitigation: By decoupling FEOL heating, hotspot heating, & background heating, the study identifies key contributors to peak temperature rise. /Part 2 https://t.co/Atkg3o3sAt

#IEDM2025 – Transistor-to-Package Thermal Simulation w/Hotspot Mitigation: Integrating physics-based thermal SPICE simulations of nanosheet & CFETs w/FEM techniques enables comprehensive thermal simulation from transistor-to-package-level./Part 1 https://t.co/Atkg3o3sAt

#IEDM2025 video is here! Please take a moment to get a preview of the technical program for the 2025 International Electron Devices Meeting, scheduled for December 6 - 11 at the San Francisco Hilton Union Square. View the video here: https://t.co/d5z7QYQ5Mn

#IEDM2025 Exhibit – Exhibitors won’t just present static displays – many host live demos, interactive sessions, & “meet the experts” to spark technical dialogue. Exhibitors are hand-picked for innovation in electron devices./Part 3 Exhibitors:

#IEDM2025 Exhibit – Nanoscale CMOS transistors, advanced memory, quantum & nano-scale architectures, novel sensors & MEMS, power harvesting & energy-efficiency, process tools, modeling software, & system-level integration technologies./Part 2 Exhibitors:

#IEDM2025 Exhibit – Industry leaders, start-ups, & research-driven firms will converge at IEDM to showcase the latest in electron devices & semiconductor technology. Attendees have the opportunity to engage with exhibitors./Part 1 Exhibitor list:

#IEDM2025 GaN-Chiplet Integration: Paper 36.2, “GaN Chiplet Technology Based on 300mm GaN-on-Silicon,” H. W. Then et al, Intel/Part 6 https://t.co/gYb1fA3Ppu