At the Santa Clara campus, Marvell employees celebrated Halloween with a pumpkin carving contest, sweet treats, hot cider and creative costumes. A photo booth captured the fun as teams came together to share in the spirit of the season. Happy Halloween to all who celebrate. 🎃

A new @TollyGroup report highlights how Marvell, @Dell and @Cisco deliver high-performance, interoperable and resilient storage networks with 64G Fibre Channel solutions—featuring seamless integration and advanced congestion control. Read more: https://t.co/sSyK5zDemD

Join @theCUBE’s @furrier for #GSAWomeninLeadership with @Microsoft, @nvidia, @Meta & @MarvellTech on Microsoft’s integrated #cloud for #datacenters. 💡 Get more insights! https://t.co/T59zJ9ye6A #Silicon #SoftwareStack #EnterpriseAI

As transistor scaling slows, innovation is moving beyond the die. Multi-die packaging with RDL interposers increases compute silicon density by 2.8×, reduces signal noise and improves power efficiency—establishing a new foundation for scalable custom compute. Read more:

At @OpenComputePrj 2025, Marvell and @Jabil unveiled the TX9190 co-packaged optics switch—integrating liquid cooling to enable scalable, energy-efficient AI infrastructure. Learn how this CPO system is redefining high-performance connectivity in @ServeTheHome’s coverage:

@MarvellTech's Kishore Atreya demonstrates silicon photonics integration in their CPO switching platform. Key insight: scale-out test vehicles will lead, but real volume opportunities emerge in scale-up by decade's end https://t.co/xRA8JKL0pi #SiliconPhotonics

Ten years in, chiplets are redefining semiconductor design—unlocking flexibility, power efficiency and performance across AI and data-centric systems. In his latest blog, Michael Kanellos from Marvell explores ten key insights shaping the next decade of chiplet innovation. Read

The next wave of semiconductor innovation is happening at the system level. In a new analysis from @MoorInsStrat, Will Townsend explores how Marvell is advancing AI data centers through optimized silicon, system integration and specialized processing. Read more:

Power delivery is the new frontier for performance. Marvell’s Package Integrated Voltage Regulation (PIVR) moves regulators into the chip package—cutting transmission losses by up to 85% and boosting power delivery by 15%. Learn more: https://t.co/jBvleSBjAY

As AI systems scale, higher bandwidth and efficiency are redefining data center design. At @OpenComputePrj 2025, Kishore Atreya from Marvell joined @NextGenInfra_io to demonstrate a liquid-cooled 1 OU CPO platform powered by 16 Marvell 6.4T light engines with advanced silicon

At @OpenComputePrj 2025, Marvell showcased innovations shaping the future of AI infrastructure—spanning custom silicon, CXL memory, co-packaged optics and advanced connectivity. Highlights included new ACC linear equalizers and a 9m 800G AEC demo with Infraeo. Watch here:

As AI and data workloads scale, unlocking greater memory bandwidth is key. At @OpenComputePrj 2025, Khurram Malik from Marvell joined @NextGenInfra_io to discuss how the Structera™ portfolio addresses CXL-based memory challenges across performance, efficiency and scalability.

At theCUBE + Wired: GSA Series, Manisha Gambhir from Marvell joined leaders from @nvidia, @Microsoft and @Meta to discuss how AI is transforming semiconductor design and data center infrastructure. Watch the full conversation with @theCUBE’s @furrier: https://t.co/nR4YZZx1OA

When will co-packaged optics (CPO) reach its inflection point? At @ECOC_Exhibition 2025, Chris McCormick from Marvell shared insights on the CPO roadmap, forecasting adoption by 2028, and showcased XPUs powered by 6.4T light engines. Watch the full demo: https://t.co/BFFp0GVj3w

@MarvellTech debuts Active Copper Cable (ACC) linear equalizers at #OCP2025! Boosting AI data center performance with longer-reach, low-power copper interconnects for 800G & 1.6T. #AI #DataCenters #Connectivity #Marvell #Semiconductors https://t.co/0r69HqUecQ

Copper’s not done yet. @MarvellTech's new ACC linear equalizers extend in-rack copper reach for AI data centres, maintaining efficiency and bandwidth up to 1.6T using PAM4 signalling. 🔗 Learn more in the article: https://t.co/GxY79afx99 #Marvell #Connectivity #DataCentre

Honored to celebrate Certification Nation Day with @GPTW_US. Marvell is proud to be recognized as a Great Place to Work®—joining companies that empower employees, build trust and drive innovation through people-first cultures. Congratulations to all recognized organizations.

AI is reshaping every layer of the optical ecosystem. At @ECOC_Exhibition 2025, @lightcounting CEO Vlad Kozlov joined Marvell to discuss how AI is driving demand across scale-up, scale-out and scale-across architectures—and the future of optical connectivity. Watch here:

At @OpenComputePrj 2025, Marvell and Infraeo are demonstrating a 9-meter AEC transmitting 800G across standard copper—enabling row-scale AI infrastructure with low latency and high signal integrity. Read the blog: https://t.co/89vZVwn5BY

Marvell expands its connectivity portfolio with new ACC linear equalizers, extending copper reach while maintaining minimal latency and power efficiency. Supporting 800G and 1.6T interconnects, the solution builds on Marvell PAM4 and analog expertise. Read the announcement: