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Rachit Agarwal Profile
Rachit Agarwal

@rach4x0r

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Professor.Cornell.CS, Systems.Networking.Theory opinions are my own

Ithaca, NY
Joined October 2013
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@rach4x0r
Rachit Agarwal
6 months
Congratulations to @sakshamagarwals for winning IRTF Applied Networking research prize 2025 for one of my favorite works: HostCC (SIGCOMM’23)!.
@sakshamagarwals
Saksham Agarwal
6 months
Excited to share that our work on "Host Congestion Control" (jointly with @rach4x0r and @arvind_uw) has won the IRTF Applied Networking Research Prize 2025! . Learn more about our work here:
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@rach4x0r
Rachit Agarwal
8 months
Highly recommend!.
@rachee_singh
Rachee Singh
8 months
I am hiring a postdoc at Cornell for systems research on next-generation multi-GPU interconnects. If you are about to graduate with a PhD in CS or a related field, email me at rachee@cs.cornell.edu with your CV and a representative publication.
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@rach4x0r
Rachit Agarwal
11 months
rearchitecting memory tiering and memory protection with the host network in mind (two upcoming SOSP'24 papers)! Reach out if you would like to discuss!.
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@rach4x0r
Rachit Agarwal
11 months
understanding the host congestion problem in Google production clusters (HotNets'22) and extending congestion control protocols to handle host congestion (SIGCOMM'23), understanding the host network (SIGCOMM'24), and . .
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@rach4x0r
Rachit Agarwal
11 months
Congratulations to my (incredibly amazing) PhD student---@midhul---for this work!. We are doing a lot of exciting work in this space---for a starter, see our papers on understanding network stack overheads (SIGCOMM'21), rearchitecting host network stacks (SIGCOMM'22), . .
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@rach4x0r
Rachit Agarwal
11 months
make sure the new interconnect interpolates well with other interconnects within the end-to-end system. If you are designing high-performance applications that require data movement, focus on the IO just as much as you focus on the compute. .
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@rach4x0r
Rachit Agarwal
11 months
The paper demonstrates that these inefficiencies within the host network are the primary root cause for CPU, memory bandwidth and PCIe underutilization. The big take-away message is as follows. If you are designing new interconnects. .
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@rach4x0r
Rachit Agarwal
11 months
The paper shows that nanosecond-scale inefficiencies due to the poor interplay between processor, memory and peripheral interconnects within the host network can percolate through hardware, OS, and network protocols to create millisecond-scale application-layer inefficiencies. .
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@rach4x0r
Rachit Agarwal
11 months
(the paper won the SIGCOMM'24 best student paper award)!. The paper studies the interplay between different interconnects within a single host/server---processor interconnect, memory interconnect, peripheral interconnect, etc.---collectively referred to as "the host network". .
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@rach4x0r
Rachit Agarwal
11 months
especially for applications like in-memory databases, ML training and inference, storage applications, etc. If you are designing new interconnects and/or high-performance applications, our SIGCOMM'24 paper on "Understanding the Host Network" may be of interest to you! . .
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@rach4x0r
Rachit Agarwal
11 months
Why new interconnects? Data movement has emerged as the key technical challenge and existing interconnects are far from perfect---memory pressure and PCIe backpressure in today's interconnects makes it extremely hard, if not impossible, to extract hardware-level performance. .
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@rach4x0r
Rachit Agarwal
11 months
on designing software-based network stacks. From a real-world perspective, his research has impacted several network hardware designs. I am going to miss having Qizhe around! Congratulations to @CS_UVA! . @CornellCIS @Cornell @ACMSIGCOMM.
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@rach4x0r
Rachit Agarwal
11 months
presents a new network stack architecture for overcoming many of these challenges (the NetChannel paper). Qizhe's research has had both intellectual and real-world impact. Intellectually, his thesis establishes deep and intriguing research directions . .
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@rach4x0r
Rachit Agarwal
11 months
to exploit all the high-bandwidth and low-latency benefits of modern network hardware? His thesis contributes to fundamental understanding of underlying challenges (his seminal paper on Understanding Host Network Stack Overheads), and. .
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@rach4x0r
Rachit Agarwal
11 months
I am SO proud of @CaiQizhe, my second PhD student to graduate! Qizhe will soon start at @CS_UVA as an assistant professor. Qizhe's thesis explores an extremely important and hard problem---is it possible to enable software-based network stacks. .
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@rach4x0r
Rachit Agarwal
11 months
(e.g., bounded delays) with a tiny additive overhead in terms of latency, while guaranteeing near-optimal network utilization. It has been an absolute blast learning from Saksham! I couldn't be more proud! Congratulations to @UofIllinois!.
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@rach4x0r
Rachit Agarwal
11 months
Harmony is yet another example---it challenges the conventional wisdom that providing stronger semantics from the network requires large overheads, and demonstrates that networks can provide much more powerful semantics. .
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@rach4x0r
Rachit Agarwal
11 months
HostCC is one of the many such examples---Saksham's SIGCOMM best student paper award winning paper Sincronia challenges the conventional wisdom that average coflow completion time is minimized when all flows within the same coflow finish at the same time. .
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@rach4x0r
Rachit Agarwal
11 months
thinks about a problem. For instance, HostCC challenges the conventional wisdom that congestion happens primarily at network switches, and demonstrates that host congestion requires fundamentally rethinking how we design and architect network protocols and stacks. .
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@rach4x0r
Rachit Agarwal
11 months
(think about congestion happening within the datapath between peripheral devices and applications), and its implications to the design of network protocols, network stacks, and operating systems. Saksham's research has, on multiple occasions, changed the way our community. .
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