Working with a couple of MCU HALs I've always promoted an unsigned long macro to a pointer myself. Passing an address as unsigned long and see it's pointer promotion silenced inside their API though reasonable, is still hurtful to me. #VitisSDK

Maybe it's just me. Vivado+ Vitis Unified IDE on Ubuntu is such a pain.

Does anyone do RTL to overcome loneliness?.

RT @bml_khubbard: I’ve completed my year-long journey to becoming a published author in electrical engineering. Mastering FPGA Chip Design:….

RT @ATaylorFPGA: I get asked a lot how to get started with FPGAs, so this week we are going to right back to the beginning and take a look….

Vivado allocating 64KB for IP, though only 128 bytes were defined is still unfathomable. Providing unused space for PS to access than is actually implemented on the PL, could lead to unintended access to the unused space go undetected without triggering any PS exceptions.

A single write to an AXILite slave memory mapped address results in writing to different locations as seen in Vitis memory inspector. No clue what's going on here. #zynq

Took this whole weekend to write i2c controller RTL for MCP4725 DAC. Claude reviewed the design, found bugs and gave plethora of improvement points. In the end generated state machine diagram as well. Though the design is bare minimal, I learnt a lot. Such a bliss to write RTL.

Finishing work and running home to attend @ATaylorFPGA 's event. I hope I can make it in time.

Aliexpress have some i2c based modules. Seems promising. Will look if they have any SPI based ones.

Digilent Pmods are so expensive. Needed a 12-bit DAC as neither of my dev booards Cmod-S7 and Basys3 have one. Designed one quickly to order from jlcpcb. Digikey parts shipping costs more than 20€. Decided to get them assembled from jlc. Still turned out to be a bit expensive.

Implemented SPI Controller FSM on Cmod-S7 FPGA board, to talk to AD7303 DAC.

If you're a guy in your early 20s, learn embedded systems with FPGAs. You wouldn't go into debt for the rest of your life.

Doing FPGAs is therapeutic.

I guess ChatGPT cannot keep quiet without responding to every input, even after asking specifically to just listen to all the inputs first.

Could this be a blocker for $XRP #XRP ?.

Yeah sure, it's my fault #Netflix

RT @wrongbaud: I stumbled across a cool @MicrochipMakes @MicrochipTech resource for those looking to learn more about embedded protocols -….

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