ian @ Dangerous Prototypes
@dangerousproto
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We do open hardware. Bus Pirate 5, Hacker Camp Shenzhen, DirtyPCBs. Once we anodized capacitors pink!
Joined October 2008
We try to cover all your favs. All your base are belong to us :)
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smartcard tool, HEX file viewer, etc. Grab the latest firmware and check it out!
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Super happy with the new Bus Pirate HEX viewer! Valid ASCII and non-zero values are highlighted. Quiet mode (-q) hides addresses for easy paste into HEX editors. Dump range can be specified, and paging is enabled by default. Used in all data dump commands: DDR5 tool, SLE4442.
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focused on smaller size, lower cost, and calibration. Check out the SHT4x temperature and humidity sensor demo here, and the SHT3x demo below.
docs.buspirate.com
SHT4x series sensors are the latest generation of temperature and humidity sensors from Sensirion. Accuracy has improved slightly since SHT3x, but the main upgrades are faster measurements, smaller...
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Grabbed some SHT3x and SHT4x temperature and humidity sensors for a Bus Pirate demo. SHT3x is a significant upgrade to the ancient SHT2x with a wider temperature and humidity range, and higher accuracy at the extremes. SHT4x slightly improves on the SHT3x specs, but is mostly.
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RT @therealdreg: With the milled pins of the BusPirate and the PCBite Ground Kit, you can use short DUPONT cables—male or female—as ground….
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While the 93x has the excuse of being really old, the GX2431 is a modern clone. My guess is that it saves bond wire, the tiny gold thread that connects a die to the chip leads, to take the short route (just a guess).
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Then there's the GX2431, a new-ish clone of the DS2431 1-Wire EEPROM. Ground is pin 8, where power power typically connects. This chip doesn’t have a VCC pin because it's powered by the pull-up resistor on the data (DQ) pin.
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First up is the 93x series of SPI EEPROM. Power (VCC) is on the “correct” pin (8), but ground (VSS) is on non-typical pin 5. This is a VERY old family of chips, probably predating the trend of using pin 4 and 8 exclusively for power and ground.
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The typical 8 pin memory chip has ground (GND, VSS) on pin 4 and power (VCC) pin 8. It does not seem to be a formal standard, more a tradition. Modern EEPROMs (24x, 25x), flash (25Qx), SRAM (23x) and FRAM all have a similar pinout. However there are a couple oddities out there.
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While the protocol feels I2C-ish, the chip is organized like an SPI EEPROM. Same kind of instruction set with a write enable latch. Identical Status Register with Write In Progress bit to poll, and two Block Protection bits. Strange little device.
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. in the boardroom, but do you rush to an obscure timing-sensitive protocol just to save a uC pin or two? The primary sell seems to be vendor lock-in (toner cartridges, cables, etc). I'm interested in playing with one, but is it too obscure/dead end to invest in?.
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Has anyone used a Microchip UNI/O single wire EEPROM? Protocol looks like Manchester encoded I2C. Debuted >10 years ago (when 1-Wire was already a zombie) with talk of a bunch of devices. Today there's just a couple EEPROMs, and a few hits on GitHub. Single wire must kill it.
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About twice a year I need a through hole resistor kit, but this is also fine. The Bus Pirate eeprom command is now read/write/dump/verify/testing 1-Wire EEPROMs.
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We can test which bits are available by writing 0b10001100 to the status register. If the chip supports WPEN or BPx bits, they will be set to 1 after the write. If they are not supported, they will remain 0. This chip has BPx bits, but not WPEN bit.
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Fewer devices have a WPEN bit that disables the Write Protect (WP) pin. When WPEN is 0, the WP pin is ignored. When WPEN is 1, the WP pin is used to control write protection. If the WP pin is high, the EEPROM is write protected. If the WP pin is low, writes are enabled.
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This allows you to protect a portion of the EEPROM from being written to, even if the write enable latch is set. The block select bits are used to select which block is protected: none (0b00), the upper 1/4 (0b01), the upper 1/2 (0b10), or the entire EEPROM (0b11).
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The Bus Pirate I2C EEPROM command is coming along, so I wanted to see if we can use a common code base to work with SPI EEPROMs. I narrowed the list of SPI EEPROMs down to this set with common page sizes and addressing methods. Most SPI EEPROMs have write protection blocks.
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Next I'll get it working with a "common" set of SPI EEPROMs. Work in progress is in the latest firmware, follow or contribute to development here:
forum.buspirate.com
Device Size Size (bytes) Page Size Address Bytes Block Select Bits 24LC1025 128 KB 131072 128 2 1 in I2C ADDR bit 3 24LC512 64 KB 65536 128 2 0 24LC256 32 KB 32768 64 2 0 24LC128 16 KB 16384 64 2 0...
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