This weekend has been about true random numbers. Did you know that #FPGA intrinsic features make them ideal to generate high-quality random numbers?.

For experienced engineers, #AI is not a gain; it's an exponent.

RT @TheBadg_ES: #VLCTechFest25 .🇪🇸 🎤Entrevista de @lennnair a nuestra compañera @swtestingsoul 🔧✨.#VLCTechFest #thebadges #soldering #works….

RT @fpgahelper: @controlpaths One day left to back the pre-order campaign on Crowd Supply:

The fact that the European Commission wants to decrypt your encrypted data is a big anomaly.

RT @TheBadg_ES: 🇪🇸Nos vamos a #DEFCON con 2 badges únicos. Iremos soltando detalles muy pronto. 👀.¡Nos vemos en el desierto! 🚀. 🇬🇧We are….

Spending the Sunday afternoon working on the demo for Las Vegas!

Hacker nivel leerse el libro de @mindcrypt utilizando como marca página una pegatina de @RadioHacking

That algorithms like SHA-256 can be accelerated using processor extensions is something many of us know, but the fact that you can use an #FPGA to calculate multiple hashes in parallel to break one is something only FPGA designers usually know. Don't worry, in this article, I.

¿Crees que las #FPGA o los #SOC no tienen cabida en los entornos #industriales? Aplicaciones como visión artificial, control en tiempo real, IA en el borde. necesitan en general gran potencia de cálculo. En este curso te cuento como los SOM #KRIA pueden hacerte la vida un poco

I'm thrilled to announce that I'll be at the Crypto & Privacy Village at #DEFCON, talking about how reconfigurable devices can make your systems more resilient against quantum attacks. Come join me, and if you see me around, say hi and I'll give you a sticker!.

With the arrival of Spartan7 US+, with some features focused on post-quantum computing, I am very sure that this post is is completely true. If you want to know more, DM.

RT @python_vlc: Gracias a todas las personas que asistieron esta semana al evento. ☀️Vamos a hacer un parón de verano y volveremos con más….

Using something different than a clock in a sensitivity list of an always block in Verilog is allowed, but for me is weird. what do you think?.

RT @swtestingsoul: Road to #defcon33 🚀.Join me on this adventure at @AppSec_Village 👩‍💻

This month I presented #FPGAs in two different SW conferences. In both I received the same question. are FPGA a mature technology? .Absolutely! They are in their 40s!.

RT @python_vlc: 🗓 ¡Os recordamos que mañana tenemos evento a las 18:30!. Serán en las oficinas de GuruSup (C/Guillem de Castro 9, 7ª Planta….

Night for getting the demo ready for the next talk.

How is this still considered "embedded"? Everybody knows that you need to suffer finding a register address in the datasheet to be considered "embedded".

This week on controlpaths we dive into the #AXI Datamover IP, demonstrating how to write data to #DDR memory using an AXI Stream interface. Tests were performed on the popular #FPGA based #Arty board. Check it out!.