Perhaps surprisingly, we find that our method beats SOTA GNN architectures, while reducing memory consumption from O(E) to O(V). This was evaluated on large datasets taken from the Benchmarking GNNs work and OGB.

Our approach is inspired by my experience working on signal processing on embedded devices. Our method has a convenient interpretation of effectively giving each vertex its own weight matrix. Alternative interpretations are also given in the paper.

This approach alone seems to give *better* results than GAT, despite the resource efficiency. This alone is very interesting, as the asymptotic improvements to memory consumption are non-trivial.

But that's not all! Using the ideas proposed by PNA, we can extend our model to have multiple aggregators. With little tuning this gives SOTA results. This result raises questions on what is important for GNN architecture design.

We also propose "aggregator fusion" which allows you to use these extra aggregators with little latency penalty. Since unstructured sparse operations are memory bound, we can do computation "for free" when we would otherwise be idle.

We designed our architecture with thought given to current hardware design. At present, GNN accelerators focus on sparse matrix multiplication, and can't accelerate SOTA models.

EGC can be accelerated by these designs -- and is therefore likely to be very useful in practice!

I'd like to thank @itsmebenday @jafermarq @chaitjo among others for their comments that helped to improve this work 🙂