Adam Taylor
@ATaylorFPGA
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FPGA and Embedded Systems expert, Experienced #System, #Hardware, #FPGA designer. Views My Own
Joined March 2014
How about a FPGA community? This could be interesting to share knowledge / learning and help each other. I just created one, link below!
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I am curious if you work in FPGA / ASIC design in the Mil Aero, Space, High Reliability world. Are you allowed to use AI/ML tools for code generation.
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This afternoon I am taking a look at the MathWorks Deep Learning Processor IP running on a ZCU102 from block RAM.
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I like backing projects on Kickstarter and Crowsupply, though my accountant probably does not like it. I backed this one on Kickstarter a little while ago the Particle Tachyon - It is interesting it has 8 Processor cores, a 12 TOPS NPU, 8GB RAM, MIPI support and 5G and WiFi
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FPGAs are great for DSP, over the years I have created a lot of material on this area. My blog this week collates all these resources into a handy reference, so no matter if you want to learn about fixed or floating point math in FPGA, rounding, algorithms, creating filters or
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Long day of FPGA ahead but hey I am at the airport for a early flight so rude not to.
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RT @Hacksterio: In this write-up, @ATaylorFPGA takes a look at how Adiuvo Engineering created a reference design of a high-performance HDMI….
hackster.io
We’ve built a high-performance HDMI 2.0 pass-through system that supports 4K at 60Hz using the AMD Artix™ UltraScale+™ FPGA on the AUBoard
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AI is increasingly important in systems and at the edge, however getting to grips with it might appear challenging. Today we are announcing our introduction to AI course, 5 days of hands on AI Training. This course will start with the basics, and progress you through to
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Over the last week or so in moment when FPGAs were building I have been bringing up the RPI Compute Module 5 on the Embedded System Tile carrier card. Overall it went very smoothly, this was the first time I brought up a RPI CM5, so I wrote up the steps involved and the design
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Tip for the day, if you buy a new Smart Lynq which shows 2017.3 as the version of HW Server running on it. You need to use an earlier intermediate version of Vivado to update the Smart Lynq such that more modern versions of Vivado such as 2023 onwards will detect and update the
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The ability to debug high speed signals is something which is interesting for our signal and image processing applications. I recently invested in a Exostiv Probe for high speed debugging, I thought it would make an interesting blog.
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Had a great day with a client today teaching them about development with a FPGA family new to them. Tips, tricks and even the issues with the tool chain.
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Oh no a few minutes queue at schipol immigration. Still better to be free of the EU then sadled with a dying corrupt organisation and its laughable trade deal. Funny thing is they could open electronics gates to UK our government are just weak at negotiating.
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We have been developing a lot more boards recently, there is something special about seeing your hardware design come to life. Especially when it has a FPGA on it, designing chip down can be a little daunting, however it does not need to be that way. I just wrote a article
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A fun afternoon looking at the Exostiv Labs high speed probe, it uses the Gigabit Transceivers to provide a ILA type debugging only at up to 65 Gbps. I decided to invest in one after seeing them at DAC, it will be very useful for image processing applications.
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I have officially worked on 10 ish satellites. The real number is way higher as the client does not want to admit they did not have the skills internally for the FPGA or boards designs. It gets funny when you see them congratulated by politicians, you want to say I did that lol.
Share a piece of undisclosed insider space/defense industry information lore about yourself
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The next issue of the the FPGA Horizons new letter is out. This issues has an update on the conference, community projects, newly released FPGA books and of course some FPGA roles.
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First time I have brought up a Raspberry PI Compute Module and it could not have been easier. So far the Ethernet, Dual USB A, USB C, Dual HDMI have worked flawlessly. Next step is to test the MIPI cameras and SD card before starting on the FPGA Tile bring up and testing. If you
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Ensuring your design is functionally correct means verification, one method of helping assess the quality of your test harnesses is Code Coverage. This week we are looking at Vivado Simulator and code coverage using VHDL. The quality of reports and information provided is
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